Memory delays in GS160 OS:Tru64 5.1 PK3.

From: Sdrolias Aristotelis (ASdrolias@cosmote.gr)
Date: Fri Sep 03 2004 - 11:19:05 EDT


Hello all,

System: GS160 OS:Tru64 5.1 PK3.

I have some questions on memory delays and how they can impact performance of the system.
Any help would be valueable.

---------------------------------------------------
Memory Interleaving
---------------------------------------------------

I got this info from HP:
"Mixing the memory sizes limits the interleaving capability and the potential bandwidth of the system. Better system performance can be achieved with a larger interleaving factor.
For better memory bandwidth, spread two, four, or eight arrays (a power of two) evenly across the four memory modules."

1) If I understand correctly the memory chips used should be of the same size and their number should be a power of 2 in one particular QBB. If not what is the optimum placement and size selection?
2) If I use memory chips of different size on the same QBB this might potentially reduce the interleaving factor as stated in the answer I got from HP. This means that the pipelining that "memory interleaving" is trying to establish is not functioning as it should be.
Are there any other possible impacts? (e.g redirection of memory request to an other RAD?)
How this can impact the performance of the system and in what level?

Kind regards & have a nice weekend,
---------------------------------------------------
A. Sdrolias
email: asdrolias@cosmote.gr



This archive was generated by hypermail 2.1.7 : Sat Apr 12 2008 - 10:50:07 EDT