LOM question

From: Mt Dew (devconf@yahoo.com)
Date: Thu Aug 15 2002 - 17:39:59 EDT


Hi,

I don't know what key sequence I hit, but now everytime I bootup the machine up
I see complete diag messages. Is it because something failed?
Can you tell me how to turn it on or off?
I check LOM section but couldn't find the detail.
Thanks

lom>poweron
lom>
LOM event: +0h13m31s host power on
ocessor Speed = [Speed Jumper = 5] 500 MHz
Baud rate is 9600
8 Data bits, 1 stop bits, no parity (configured from lom)

Firmware CORE Sun Microsystems, Inc.
@(#) core 1.0.14 2001/11/07 17:16
Hardware Power ON
Verifying NVRAM...Done
Bootmode is 0
MCR0 = 36a0bc06
MCR1 = c0804000
MCR2 = f80a000
MCR3 = 202
Ecache Size = 256 KB
NVRAM Test
Icache Test
Dcache Test
MMU Test
Ecache Tag Addr Test
Ecache RAM Addr Test
Clearing E$ Tags Done
Clearing I/D TLBs Done
Probing memory
Done
MEMBASE=0x60000000
MEMSIZE=0x8000000
Data Line Test
Core Memory Test
Clearing memory...including Unix retained memory...Done
Turning ON MMUs Done
Copy ROM to RAM (154112 bytes) Done
Orig PC=0x1fff0007ef0 New PC=0xf0f07f48
Processor Speed=500MHz
Memory Data Line Test
Memory Addr Line w/ Ecache Test
ECC Block Memory Test
Looking for Dropin cPOST ... found
Decompressing Client Done
Transferring control to Client...

Sun Microsystems, Inc. cPOST
@(#) cpost 1.0.14 2001/11/07 17:16

All Basic UltraSPARC IIe PBM Tests
        Init CPU PBM
        PIO Decoder And BCT Test
        CPU IOMMU Reg Test
        CPU IOMMU RAM NTA Test
        CPU IOMMU CAM NTA Test
        CPU IOMMU RAM Address Test
        CPU IOMMU CAM Address Test
        IOMMU TLB Compare Test
        IOMMU TLB Flush Test
        PBM Control/Status Reg Test
        PBM Diag Reg Test
        CPU PBM Reg Test

DM9102A Ethernet #1 Config Space Reg Test
DM9102A Ethernet #2 Config Space Reg Test
Basic SouthBridge Tests
        Southbridge ISA Config Space Reg Test
        Southbridge PMU Config Space Reg Test
        Southbridge IDE Config Space Reg Test
        Southbridge USB Config Space Reg Test
All Memory Stress Tests
        Consist Write Data Test
Resetting...

Processor Speed = 500 MHz
Baud rate is 9600
8 Data bits, 1 stop bits, no parity (configured from lom)
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