SUMMARY: cpu cache

From: Clift, Robert T CTR K55-Branch (robert.clift.ctr@navy.mil)
Date: Thu Aug 31 2006 - 14:49:10 EDT

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I sent my questions a little too early. I found it at:
http://en.wikipedia.org/wiki/SPARC#History

Original question:

All, does anyone have a chart with the sizes of level 1 and level 2 cache on
the USII and USIII sparc chips.
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