From: HRISHIKESH KULKARNI (hrk007@yahoo.com)
Date: Mon Oct 11 2004 - 14:10:47 EDT
Hi Folks,
I am trying to power up a V1280 when I get following
messages on console before it stops booting any
further.The power source is fine since another V1280
boots up fine from it.
Please let me know what could be the
problem.Billing-A is hostname of the machine and it
has been in use and working perfectly fine for last
few months.
Thanking in advance.
Regards,
Hrishi.
Hardware Reset...
@(#) SYSTEM CONTROLLER(SC) POST 38 2003/11/18 21:21
PSR = 0x044010e5
PCR = 0x04004000
Memory size = 32MB
SelfTest running at DiagLevel:0x20
SC Boot PROM Test
BootPROM CheckSum Test
IU Test
IU instruction set Test
Little endian access Test
FPU Test
FPU instruction set Test
SparcReferenceMMU Test
SRMMU TLB RAM Test
SRMMU TLB Read miss Test
SRMMU page probe Test
SRMMU segment probe Test
SRMMU region probe Test
SRMMU context probe Test
IIep Internal Cache Test
DCACHE RAM access Test
DCACHE TAG access Test
DCACHE Read miss Test
DCACHE Read hit Test
DCACHE Write miss Test
DCACHE Write hit Test
ICACHE RAM access Test
ICACHE TAG access Test
ICACHE miss Test
ICACHE hit Test
ICACHE TAG flush Test
PCIC Test
PCIC Probe Test
PCIC Config Register Access Test
PCI Master Abort Test
PCIC Init Test
Memory Test
Memory Address Test
MemBankAddrTest: start address = 0x00010000
RIO Ebus Test
Rio Ebus Probe Test
RIO Ethernet Test
Rio Enet Probe Test
Rio Ethernet Int Loopbacks Test
DUART(16552) InterSC Test
Loopback Test
COM3 port
COM4 port
Interrupt Test
COM3 port Intr #2
COM4 port Intr #2
System Clock Test
System Clock verify Test
Board0 Clock is selected
75MHZ Fixed Crystal is the selected Clock Source
CLK(Self) :0x0000ffff CLK(Other) : 0x00000000
REF : 0x00002227
CLOCK(SELF) FREQ : 74.95 MHZ
CLOCK(OTHER) FREQ : 0.0 MHZ
SBBC PCI Controller Test
SBBC PCI Config Space probe Test
SBBC Internal Reg Access Test
SBBC Interrupts Test
Port1 interrupt generation Tests INTR #14
Port0 interrupt generation Tests INTR #14
SBBC Device0 Test
PS Fail Reg(SBBC Dev0) Test
SBBC Device1 Test
SRAM (SBBC Dev1) Test
Memory Address Test (Non-destructive)
SBBC Device2 Test
BId&MFG Reg (SBBC Dev2) Test
SBBC Device3 Test
FRU Prsnt Reg (SBBC Dev3) Test
SBBC Device5 Test
EPLD (SBBC Dev5) Test
TOD(M48T59) Test
TOD Init Test
TOD Functional Test
TOD NVRAM(Non-Destructive) Test
TOD Interrupts Test
I2C Register Access Test
Enable Mux Register Test
Channel Mux Register Test
Add Command Register Test
Data Register Test
Local I2C AT24C64 Test
EEPROM Device Test
performing eeprom sequential read
Local I2C PCF8591 Test
VOLT_AD Device Test
channel[00000001] Voltage(0x00000099) :1.49
channel[00000002] Voltage(0x0000009C) :3.35
channel[00000003] Voltage(0x0000009A) :5.1
channel[00000004] Voltage(0x00000000) :0.0
Local I2C LM75 Test
TEMP0(IIep) Device Test
Temperature : 22.0 Degree(C)
Local I2C LM75 Test
TEMP1(Rio) Device Test
Temperature : 20.0 Degree(C)
Local I2C LM75 Test
TEMP2(CBH) Device Test
Temperature : 31.0 Degree(C)
Local I2C PCF8574 Test
Sc CSR Device Test
Console Bus Hub Test
CBH Register Access Test
POST Complete.
ERI Device Present
Getting MAC address for SSC1
I2c error: slave did not ACK
I2c error: slave did not ACK
I2c error: slave did not ACK
SCC MAC Address not available.
Ethernet not configured.
MAC address is 0:0:0:0:0:0
Attaching interface lo0...done
Copyright 2001-2004 Sun Microsystems, Inc.
All rights reserved.
Use is subject to license terms.
Sun Fire System Firmware
RTOS version: 38
ScApp version: 5.17.0
SC POST diag level: min
I2c error: slave did not ACK
The date is Monday, October 11, 2004, 6:47:40 AM PDT.
Mon Oct 11 06:47:41 Billing-A lom: Boot: ScApp 5.17.0,
RTOS 38
Mon Oct 11 06:47:44 Billing-A lom: SBBC Reset
Reason(s): Power On Reset
Mon Oct 11 06:47:44 Billing-A lom: Initializing the SC
SRAM
Mon Oct 11 06:47:47 Billing-A lom: i2c error while
reading from System Config Ca
rd
Mon Oct 11 06:47:47 Billing-A lom: SCC is inaccessible
- please insert valid SCC
Hardware Reset...
@(#) SYSTEM CONTROLLER(SC) POST 38 2003/11/18 21:21
PSR = 0x044010e5
PCR = 0x04004000
Memory size = 32MB
SelfTest running at DiagLevel:0x20
SC Boot PROM Test
BootPROM CheckSum Test
IU Test
IU instruction set Test
Little endian access Test
FPU Test
FPU instruction set Test
SparcReferenceMMU Test
SRMMU TLB RAM Test
SRMMU TLB Read miss Test
SRMMU page probe Test
SRMMU segment probe Test
SRMMU region probe Test
SRMMU context probe Test
IIep Internal Cache Test
DCACHE RAM access Test
DCACHE TAG access Test
DCACHE Read miss Test
DCACHE Read hit Test
DCACHE Write miss Test
DCACHE Write hit Test
ICACHE RAM access Test
ICACHE TAG access Test
ICACHE miss Test
ICACHE hit Test
ICACHE TAG flush Test
PCIC Test
PCIC Probe Test
PCIC Config Register Access Test
PCI Master Abort Test
PCIC Init Test
Memory Test
Memory Address Test
MemBankAddrTest: start address = 0x00010000
RIO Ebus Test
Rio Ebus Probe Test
RIO Ethernet Test
Rio Enet Probe Test
Rio Ethernet Int Loopbacks Test
DUART(16552) InterSC Test
Loopback Test
COM3 port
COM4 port
Interrupt Test
COM3 port Intr #2
COM4 port Intr #2
System Clock Test
System Clock verify Test
Board0 Clock is selected
75MHZ Fixed Crystal is the selected Clock Source
CLK(Self) :0x0000ffff CLK(Other) : 0x00000000
REF : 0x00002228
CLOCK(SELF) FREQ : 74.94 MHZ
CLOCK(OTHER) FREQ : 0.0 MHZ
SBBC PCI Controller Test
SBBC PCI Config Space probe Test
SBBC Internal Reg Access Test
SBBC Interrupts Test
Port1 interrupt generation Tests INTR #14
Port0 interrupt generation Tests INTR #14
SBBC Device0 Test
PS Fail Reg(SBBC Dev0) Test
SBBC Device1 Test
SRAM (SBBC Dev1) Test
Memory Address Test (Non-destructive)
SBBC Device2 Test
BId&MFG Reg (SBBC Dev2) Test
SBBC Device3 Test
FRU Prsnt Reg (SBBC Dev3) Test
SBBC Device5 Test
EPLD (SBBC Dev5) Test
TOD(M48T59) Test
TOD Init Test
TOD Functional Test
TOD NVRAM(Non-Destructive) Test
TOD Interrupts Test
I2C Register Access Test
Enable Mux Register Test
Channel Mux Register Test
Add Command Register Test
Data Register Test
Local I2C AT24C64 Test
EEPROM Device Test
performing eeprom sequential read
Local I2C PCF8591 Test
VOLT_AD Device Test
channel[00000001] Voltage(0x00000099) :1.49
channel[00000002] Voltage(0x0000009C) :3.35
channel[00000003] Voltage(0x0000009A) :5.1
channel[00000004] Voltage(0x00000000) :0.0
Local I2C LM75 Test
TEMP0(IIep) Device Test
Temperature : 21.50 Degree(C)
Local I2C LM75 Test
TEMP1(Rio) Device Test
Temperature : 19.50 Degree(C)
Local I2C LM75 Test
TEMP2(CBH) Device Test
Temperature : 30.50 Degree(C)
Local I2C PCF8574 Test
Sc CSR Device Test
Console Bus Hub Test
CBH Register Access Test
POST Complete.
ERI Device Present
Getting MAC address for SSC1
I2c error: slave did not ACK
I2c error: slave dip
Hardware Reset...
@(#) SYSTEM CONTROLLER(SC) POST 38 2003/11/18 21:21
PSR = 0x044010e5
PCR = 0x04004000
Memory size = 32MB
SelfTest running at DiagLevel:0x20
SC Boot PROM Test
BootPROM CheckSum Test
IU Test
IU instruction set Test
Little endian access Test
FPU Test
FPU instruction set Test
SparcReferenceMMU Test
SRMMU TLB RAM Test
SRMMU TLB Read miss Test
SRMMU page probe Test
SRMMU segment probe Test
SRMMU region probe Test
SRMMU context probe Test
IIep Internal Cache Test
DCACHE RAM access Test
DCACHE TAG access Test
DCACHE Read miss Test
DCACHE Read hit Test
DCACHE Write miss Test
DCACHE Write hit Test
ICACHE RAM access Test
ICACHE TAG access Test
ICACHE miss Test
ICACHE hit Test
ICACHE TAG flush Test
PCIC Test
PCIC Probe Test
PCIC Config Register Access Test
PCI Master Abort Test
PCIC Init Test
Memory Test
Memory Address Test
MemBankAddrTest: start address = 0x00010000
RIO Ebus Test
Rio Ebus Probe Test
RIO Ethernet Test
Rio Enet Probe Test
Rio Ethernet Int Loopbacks Test
DUART(16552) InterSC Test
Loopback Test
COM3 port
COM4 port
Interrupt Test
COM3 port Intr #2
COM4 port Intr #2
System Clock Test
System Clock verify Test
Board0 Clock is selected
75MHZ Fixed Crystal is the selected Clock Source
CLK(Self) :0x0000ffff CLK(Other) : 0x00000000
REF : 0x00002228
CLOCK(SELF) FREQ : 74.94 MHZ
CLOCK(OTHER) FREQ : 0.0 MHZ
SBBC PCI Controller Test
SBBC PCI Config Space probe Test
SBBC Internal Reg Access Test
SBBC Interrupts Test
Port1 interrupt generation Tests INTR #14
Port0 interrupt generation Tests INTR #14
SBBC Device0 Test
PS Fail Reg(SBBC Dev0) Test
SBBC Device1 Test
SRAM (SBBC Dev1) Test
Memory Address Test (Non-destructive)
SBBC Device2 Test
BId&MFG Reg (SBBC Dev2) Test
SBBC Device3 Test
FRU Prsnt Reg (SBBC Dev3) Test
SBBC Device5 Test
EPLD (SBBC Dev5) Test
TOD(M48T59) Test
TOD Init Test
TOD Functional Test
TOD NVRAM(Non-Destructive) Test
TOD Interrupts Test
I2C Register Access Test
Enable Mux Register Test
Channel Mux Register Test
Add Command Register Test
Data Register Test
Local I2C AT24C64 Test
EEPROM Device Test
performing eeprom sequential read
Local I2C PCF8591 Test
VOLT_AD Device Test
channel[00000001] Voltage(0x00000099) :1.49
channel[00000002] Voltage(0x0000009C) :3.35
channel[00000003] Voltage(0x0000009A) :5.1
channel[00000004] Voltage(0x00000000) :0.0
Local I2C LM75 Test
TEMP0(IIep) Device Test
Temperature : 21.0 Degree(C)
Local I2C LM75 Test
TEMP1(Rio) Device Test
Temperature : 19.0 Degree(C)
Local I2C LM75 Test
TEMP2(CBH) Device Test
Temperature : 30.50 Degree(C)
Local I2C PCF8574 Test
Sc CSR Device Test
Console Bus Hub Test
CBH Register Access Test
POST Complete.
ERI Device Present
Getting MAC address for SSC1
I2c error: slave did not ACK
I2c error: slave did not ACK
I2c error: slave did not ACK
SCC MAC Address not available.
Ethernet not configured.
MAC address is 0:0:0:0:0:0
Attaching interface lo0...done
Copyright 2001-2004 Sun Microsystems, Inc.
All rights reserved.
Use is subject to license terms.
Sun Fire System Firmware
RTOS version: 38
ScApp version: 5.17.0
SC POST diag level: min
I2c error: slave did not ACK
The date is Monday, October 11, 2004, 3:52:43 PM PDT.
Mon Oct 11 15:52:44 Billing-A lom: Boot: ScApp 5.17.0,
RTOS 38
Mon Oct 11 15:52:47 Billing-A lom: SBBC Reset
Reason(s): Power On Reset
Mon Oct 11 15:52:47 Billing-A lom: Initializing the SC
SRAM
Mon Oct 11 15:52:50 Billing-A lom: i2c error while
reading from System Config Ca
rd
Mon Oct 11 15:52:50 Billing-A lom: SCC is inaccessible
- please insert valid SCC
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This archive was generated by hypermail 2.1.7 : Wed Apr 09 2008 - 23:29:33 EDT