Problem in E450

From: Hirdejit Singh (hirdejit@rediffmail.com)
Date: Mon Jun 03 2002 - 07:44:30 EDT


I hv a SUN E450 with CLARiiON and PCI fiber cards.OS is 2.7 and
latest patches installed.When I rebooted the machine it gave some
error messages and then rebooted and now is in a loop....displays
error messages and reboots.I attached it to another machine via
tip connections .Its written below .Please suggest.

$ tip -9600 /dev/term/a
connected

Hardware Power ON

CPU1 has assumed the role of Boot CPU

@(#) Sun Ultra 450 3.14 Version 1 created 1999/02/12 07:50
Offline: CPU0
Online: CPU1 Ultra-II (v9.0) 4:1 4096KB 2-2 ECache MCap 7
Offline: CPU2
Offline: CPU3
Set-Speed Reset

CPU1 has assumed the role of Boot CPU

@(#) Sun Ultra 450 3.14 Version 1 created 1999/02/12 07:50
Offline: CPU0 (MD'ed)
Online: CPU1 Ultra-II (v9.0) 4:1 4096KB 2-2 ECache MCap 7
Offline: CPU2 (MD'ed)
Offline: CPU3 (MD'ed)
Probing keyboard for L1/L1-D...Done
Executing Power On SelfTest w/%o0 = 0000.0000.0010.4001

1>
1>@(#) Sun UltraSPARC-II 4-way UPA/PCI POST 6.0.9 02/12/99:
07:52
1>INFO: Processor 1 is master CPU.
1>INFO: Motherboard rev FCS
1>
1> <00> Init System BSS
1> <00> NVRAM Battery Detect Test
1> <00> NVRAM Scratch Addr Test
1> <00> DMMU TLB Tag Access Test
1> <00> DMMU TLB RAM Access Test
1> <00> Probe Ecache
1>INFO: 4096KB Ecache
1> <00> Ecache RAM Addr Test
1> <00> Ecache Tag Addr Test
1> <00> Invalidate Ecache Tags
1> <00> SC Dtag Probe
1>INFO: Dtag supports up to 8MB Ecache
1>INFO: Processor 0 is missing or disabled.
1>INFO: Processor 2 is missing or disabled.
1>INFO: Processor 3 is missing or disabled.
1> <00> Init SC Regs
1> <00> SC Address Reg Test
1> <00> SC Reg Index Test
1> <00> SC Regs Test
1> <00> SC Dtag RAM Addr Test
1> <00> SC Dtag Init
1> <00> Init SC Regs
1> <00> SC Cache Size Init
1> <00> Synch up Processor Ecache Sizes
1> <00> Probe Memory
1>INFO: 512MB Bank 0
1>INFO: No memory detected in Bank 1
1>INFO: No memory detected in Bank 2
1>INFO: No memory detected in Bank 3
1> <00> Test Memory Data Lines
1> <00> Test Memory Address Lines
1> <00> Malloc Post Memory
1> <00> Init Post Memory
1> <00> Map PROM/STACK/NVRAM in DMMU
1> <00> Memory Stack Test
1> <00> Init Memory
1> <00> ECC Memory Addr Test
1> <00> V9 Instruction Test
1> <00> Memory Addr w/ Ecache Test
1> <00> Block Memory Addr Test
1> <00> FPU Regs Test
1> <00> FPU Move Regs Test
1> <00> FPU State Reg Test
1> <00> FPU Functional Test
1> <00> FPU Trap Test
1> <00> DMMU Primary Context Reg Test
1> <00> DMMU Secondary Context Reg Test
1> <00> DMMU TSB Reg Test
1> <00> DMMU Tag Access Reg Test
1> <00> DMMU VA Watchpoint Reg Test
1> <00> DMMU PA Watchpoint Reg Test
1> <00> IMMU TSB Reg Test
1> <00> IMMU Tag Access Reg Test
1> <00> IMMU TLB RAM Access Test
1> <00> IMMU TLB Tag Access Test
1> <00> Dcache RAM Test
1> <00> Dcache Tag Test
1> <00> Icache RAM Test
1> <00> Icache Tag Test
1> <00> Icache Next Test
1> <00> Icache Predecode Test
1> <00> DMMU Hit/Miss Test
1> <00> DMMU Little Endian Test
1> <00> IU ASI Access Test
1> <00> FPU ASI Access Test
1> <00> CPU Addr Align Trap Test
1> <00> DMMU Access Priv Page Test
1> <00> DMMU Write Protected Page Test
1> <00> Copy Post to Memory
1> <00> Map/Exec POST from Memory
1> <00> Map alternate CPUs
1> <00> Init Memory
1>INFO: 512MB Bank 0
1>INFO: No memory in Bank 1
1>INFO: No memory in Bank 2
1>INFO: No memory in Bank 3
1> <00> OBP Memory Test
1> <1f> Init Psycho
1> <1f> Psycho Cntl and UPA Reg Test
1> <1f> Psycho DMA Scoreboard Reg Test
1> <1f> Psycho Perf Cntl Reg Test
1> <1f> PIO Decoder and BCT Test
1> <1f> PCI Byte Enable Test
1> <1f> Counter/Timer Limit Regs Test
1> <1f> Timer Increment Test
1> <1f> Timer Reload Test
1> <1f> Timer Periodic Test
1> <1f> Mondo Int Map (short) Reg Test
1> <1f> Mondo Int Set/Clr Reg Test
1> <1f> Psycho IOMMU Regs Test
1> <1f> Psycho IOMMU RAM NTA Test
1> <1f> Psycho IOMMU CAM NTA Test
1> <1f> Psycho IOMMU RAM Address Test
1> <1f> Psycho IOMMU CAM Address Test
1> <1f> IOMMU TLB Compare Test
1> <1f> IOMMU TLB Flush Test
1> <1f> Stream Buff A Control Reg Test
1> <1f> Psycho ScacheA Page Tag Addr Test
1> <1f> Psycho ScacheA Line Tag Addr Test
1> <1f> Psycho ScacheA RAM Addr Test
1> <1f> Psycho ScacheA Page Tag NTA Test
1> <1f> Psycho ScacheA Line Tag NTA Test
1> <1f> Psycho ScacheA Err Status NTA Test
1> <1f> Psycho ScacheA RAM NTA Test
1> <1f> Stream Buff B Control Reg Test
1> <1f> Psycho ScacheB Page Tag Addr Test
1> <1f> Psycho ScacheB Line Tag Addr Test
1> <1f> Psycho ScacheB RAM Addr Test
1> <1f> Psycho ScacheB Page Tag NTA Test
1> <1f> Psycho ScacheB Line Tag NTA Test
1> <1f> Psycho ScacheB Err Status NTA Test
1> <1f> Psycho ScacheB RAM NTA Test
1> <1f> PBMA PCI Config Space Regs Test
1> <1f> PBMA Control/Status Reg Test
1> <1f> PBMA Diag Reg Test
1> <1f> PBMB PCI Config Space Regs Test
1> <1f> PBMB Control/Status Reg Test
1> <1f> PBMB Diag Reg Test
1> <1f> Consist DMA Rd, IOMMU miss Lpbk Test
1> <04> Init Psycho
1> <04> Psycho Cntl and UPA Reg Test
1> <04> Psycho DMA Scoreboard Reg Test
1> <04> Psycho Perf Cntl Reg Test
1> <04> PIO Decoder and BCT Test
1> <04> PCI Byte Enable Test
1> <04> PBMA PCI Config Space Regs Test
1> <04> PBMA Control/Status Reg Test
1> <04> PBMA Diag Reg Test
1> <04> PBMB PCI Config Space Regs Test
1> <04> PBMB Diag Reg Test
1> <04> Consist DMA Rd, IOMMU miss Lpbk, PCI B Bus Test
1> <04> Consist DMA Rd, IOMMU miss Lpbk Test
1> <06> Init Psycho
1> <06> Psycho Cntl and UPA Reg Test
1> <06> Psycho DMA Scoreboard Reg Test
1> <06> Psycho Perf Cntl Reg Test
1> <06> PIO Decoder and BCT Test
1> <06> PCI Byte Enable Test
1> <06> PBMA PCI Config Space Regs Test
1> <06> PBMA Control/Status Reg Test
1> <06> PBMA Diag Reg Test
1> <06> PBMB PCI Config Space Regs Test
1> <06> PBMB Diag Reg Test
1> <06> Consist DMA Rd, IOMMU miss Lpbk, PCI B Bus Test
1> <06> Consist DMA Rd, IOMMU miss Lpbk Test
1> <1f> Init Psycho
1> <1f> Mondo Generate Interrupt Test
1> <1f> Timer Interrupt Test
1> <1f> Timer Interrupt w/ periodic Test
1> <1f> Psycho Stream Buff A Flush Sync Test
1> <1f> Psycho Stream Buff B Flush Sync Test
1> <1f> Psycho Stream Buff A Flush Invalidate Test
1> <1f> Psycho Stream Buff B Flush Invalidate Test
1> <1f> Psycho Merge Buffer w/ Scache A Test
1> <1f> Psycho Merge Buffer w/ Scache B Test
1> <1f> Consist DMA Rd, IOMMU miss Ebus Test
1> <1f> Consist DMA Rd, IOMMU miss Lpbk Test
1> <1f> Consist DMA Rd, IOMMU hit Ebus Test
1> <1f> Consist DMA Rd, IOMMU hit Lpbk Test
1> <1f> Consist DMA Wr, IOMMU miss Ebus Test
1> <1f> Consist DMA Wr, IOMMU miss Lpbk Test
1> <1f> Consist DMA Wr, IOMMU hit Ebus Test
1> <1f> Consist DMA Wr, IOMMU hit Lpbk Test
1> <04> Init Psycho
1> <04> Psycho Stream Buff A Flush Sync Test
1> <04> Psycho Stream Buff B Flush Sync Test
1> <04> Psycho Stream Buff A Flush Invalidate Test
1> <04> Psycho Stream Buff B Flush Invalidate Test
1> <04> Psycho Merge Buffer w/ Scache A Test
1> <04> Psycho Merge Buffer w/ Scache B Test
1> <04> Consist DMA Rd, IOMMU miss Lpbk Test
1> <04> Consist DMA Rd, IOMMU miss Lpbk, PCI B Bus Test
1> <04> Consist DMA Rd, IOMMU hit Lpbk Test
1> <04> Consist DMA Wr, IOMMU miss Lpbk Test
1> <04> Consist DMA Wr, IOMMU hit Lpbk Test
1> <06> Init Psycho
1> <06> Psycho Stream Buff A Flush Sync Test
1> <06> Psycho Stream Buff B Flush Sync Test
1> <06> Psycho Stream Buff A Flush Invalidate Test
1> <06> Psycho Stream Buff B Flush Invalidate Test
1> <06> Psycho Merge Buffer w/ Scache A Test
1> <06> Psycho Merge Buffer w/ Scache B Test
1> <06> Consist DMA Rd, IOMMU miss Lpbk Test
1> <06> Consist DMA Rd, IOMMU miss Lpbk, PCI B Bus Test
1> <06> Consist DMA Rd, IOMMU hit Lpbk Test
1> <06> Consist DMA Wr, IOMMU miss Lpbk Test
1> <06> Consist DMA Wr, IOMMU hit Lpbk Test
1> <1f> Init Psycho
1> <1f> PIO Read Err, Master Abort Test
1> <1f> PIO Read Err, Target Abort Test
1> <1f> PIO Write Err, Master Abort Test
1> <1f> PIO Write Err, Target Abort Test
1> <1f> Pri CE ECC Err Test
1> <1f> Pri UE ECC Err Test
1> <1f> Pri 2 bit w/ bit hole UE ECC Err Test
1> <1f> Pri 3 bit UE ECC Err Test
1> <04> Init Psycho
1> <04> PIO Read Err, Master Abort Test
1> <04> PIO Read Err, Target Abort Test
1> <04> PIO Write Err, Master Abort Test
1> <04> PIO Write Err, Target Abort Test
1> <04> Pri CE ECC Err Test
1> <04> Pri UE ECC Err Test
1> <04> Pri 2 bit w/ bit hole UE ECC Err Test
1> <04> Pri 3 bit UE ECC Err Test
1> <06> Init Psycho
1> <06> PIO Read Err, Master Abort Test
1> <06> PIO Read Err, Target Abort Test
1> <06> PIO Write Err, Master Abort Test
1> <06> PIO Write Err, Target Abort Test
1> <06> Pri CE ECC Err Test
1> <06> Pri UE ECC Err Test
1> <06> Pri 2 bit w/ bit hole UE ECC Err Test
1> <06> Pri 3 bit UE ECC Err Test
1>STATUS=PASSED

Power On Selftest Completed
     Status = 0000.0000.0000.0000 ffff.ffff.f00b.4a80
ffdf.ffff.0bd1.1111
POST Reset

CPU1 has assumed the role of Boot CPU

@(#) Sun Ultra 450 3.14 Version 1 created 1999/02/12 07:50
Offline: CPU0 (MD'ed)
Online: CPU1 Ultra-II (v9.0) 4:1 4096KB 2-2 ECache MCap 7
Offline: CPU2 (MD'ed)
Offline: CPU3 (MD'ed)
Motherboard DTAG SRAMs support up to 8192KB of ECache per CPU
Module
Setting system ECache size to 4096KB
Clearing DTAGS...Done
Auxio Level = 0000.0000.0000.000f
Clearing E-Cache Tags...Done
Clearing I/D TLBs...Done
Probing Memory...Done
HiMem base = 0000.0000.0000.0000 size = 0000.0000.2000.0000
Clearing Memory...including Unix Retained Memory...Done
MMUs ON
Copying ROM to RAM...Done
RAM CRC = 0000.0000.a07c.8336; ROM CRC = 0000.0000.a07c.8336
Decompressing into Memory...0000.0000.0004.453c (274KB)...Done
Size = 0000.0000.0008.30c0 (525KB)
Starting Forth kernel at 0000.0000.f005.897c
ttya initialized
Memory in 1 - way interleave configuration
...Bank #0 128 + 128 + 128 + 128 : 512 MB [Available 512MB @ 0
]
...Bank #1 0 + 0 + 0 + 0 : 0 MB
...Bank #2 0 + 0 + 0 + 0 : 0 MB
...Bank #3 0 + 0 + 0 + 0 : 0 MB
Environmental monitor: enabled
Probing Floppy: drive detected on ID0
Probing Audio: audio codec not present
Primary UPA probing
Probing all UPA slots ................................Done.
At UPA Slot 1 Created Node(s)...SUNW,UltraSPARC-II
At UPA Slot 4 Created Node(s)...pci pci
At UPA Slot 6 Created Node(s)...pci pci
At UPA Slot 1f Created Node(s)...pci pci

Primary I/O probing
Probing /pci@1f,4000 at Device 1 ebus network
Probing /pci@1f,4000 at Device 3 scsi disk tape
Probing /pci@1f,4000 at Device 2 scsi disk tape
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,2000 at Device 0 This slot excluded from
probing...
Probing /pci@1f,2000 at Device 1 Nothing there
Probing /pci@1f,2000 at Device 2 Nothing there
Probing /pci@1f,2000 at Device 3 Nothing there
Probing /pci@1f,2000 at Device 4 Nothing there
Probing /pci@1f,2000 at Device 5 Nothing there
Probing /pci@6,4000 at Device 0 This slot excluded from
probing...
Probing /pci@6,4000 at Device 1 Nothing there
Probing /pci@6,4000 at Device 2 fibre-channel
Probing /pci@6,4000 at Device 3 pci
Probing /pci@6,4000/pci@3 at Device 0 pci108e,1000 SUNW,qfe
Probing /pci@6,4000/pci@3 at Device 1 pci108e,1000 SUNW,qfe
Probing /pci@6,4000/pci@3 at Device 2 pci108e,1000 SUNW,qfe
Probing /pci@6,4000/pci@3 at Device 3 pci108e,1000 SUNW,qfe
Probing /pci@6,4000/pci@3 at Device 4 Nothing there
Probing /pci@6,4000/pci@3 at Device 5 Nothing there
Probing /pci@6,4000/pci@3 at Device 6 Nothing there
Probing /pci@6,4000/pci@3 at Device 7 Nothing there
Probing /pci@6,4000/pci@3 at Device 8 Nothing there
Probing /pci@6,4000/pci@3 at Device 9 Nothing there
Probing /pci@6,4000/pci@3 at Device a Nothing there
Probing /pci@6,4000/pci@3 at Device b Nothing there
Probing /pci@6,4000/pci@3 at Device c Nothing there
Probing /pci@6,4000/pci@3 at Device d Nothing there
Probing /pci@6,4000/pci@3 at Device e Nothing there
Probing /pci@6,4000/pci@3 at Device f Nothing there

Probing /pci@6,4000 at Device 4 TSI,gfxp
Probing /pci@6,4000 at Device 5 Nothing there
Probing /pci@6,2000 at Device 0 This slot excluded from
probing...
Probing /pci@6,2000 at Device 1 fibre-channel
Probing /pci@6,2000 at Device 2 Nothing there
Probing /pci@6,2000 at Device 3 Nothing there
Probing /pci@6,2000 at Device 4 Nothing there
Probing /pci@6,2000 at Device 5 Nothing there
Probing /pci@4,4000 at Device 0 This slot excluded from
probing...
Probing /pci@4,4000 at Device 1 Nothing there
Probing /pci@4,4000 at Device 2 Nothing there
Probing /pci@4,4000 at Device 3 Nothing there
Probing /pci@4,4000 at Device 4 Nothing there
Probing /pci@4,4000 at Device 5 Nothing there
Probing /pci@4,2000 at Device 0 This slot excluded from
probing...
Probing /pci@4,2000 at Device 1 Nothing there
Probing /pci@4,2000 at Device 2 Nothing there
Probing /pci@4,2000 at Device 3 Nothing there
Probing /pci@4,2000 at Device 4 Nothing there
Probing /pci@4,2000 at Device 5 Nothing there
Post-probe Cheerio fixups

Sun Enterprise 450 (UltraSPARC-II 400MHz), No Keyboard
OpenBoot 3.14, 512 MB memory installed, Serial #11271773.
Ethernet address 8:0:20:ab:fe:5d, Host ID: 80abfe5d.

Initializing 1 megs of memory at addr 1feb6000
Initializing 1 megs of memory at addr 1fe00000
Initializing 510 megs of memory at addr 0
Rebooting with command: boot
Boot device: disk File and args:
Loading ufs-file-system package 1.4 04 Aug 1995 13:02:54.
FCode UFS Reader 1.11 97/07/10 16:19:15.
Loading: /platform/SUNW,Ultra-4/ufsboot
Loading: /platform/sun4u/ufsboot
SunOS Release 5.7 Version Generic_106541-16 64-bit [UNIX(R) System
V Release 4.0]
Copyright (c) 1983-1999, Sun Microsystems, Inc.
lpfc: Emulex LightPulse FC SCSI/IP 2.15-FCP
/pci@6,4000/fibre-channel@2 (lpfc0):
         LightPulse 8000: BIU Rev 2, ENDEC Rev 0, Firmware Rev
FF2.81 0
lpfc0: Looking for Fibre Channel devices, pausing up to 60
seconds
WARNING: /pci@6,4000/fibre-channel@2 (lpfc0):
         Giving up on discovery -- stuck on alpa 0x0!
/pci@6,2000/fibre-channel@1 (lpfc1):
         LightPulse 8000: BIU Rev 2, ENDEC Rev 0, Firmware Rev
FF2.81 0
WARNING: [AFT1] Uncorrectable Memory Error on CPU1 Data access at
TL=0, errID 0x00000028.15b0aed0
     AFSR 0x00000001<ME>.80200000<PRIV,UE> AFAR
0x00000000.1d564fc0
     AFSR.PSYND 0x0000(Score 05) AFSR.ETS 0x00 Fault_PC
0x100353dc
     UDBH 0x0203<UE> UDBH.ESYND 0x03 UDBL 0x0203<UE> UDBL.ESYND
0x03
     UDBH Syndrome 0x3 Memory Module 190x
WARNING: [AFT1] errID 0x00000028.15b0aed0 Syndrome 0x3 indicates
that this may not be a memory module problem
WARNING: [AFT1] Uncorrectable Memory Error on CPU1 Data access at
TL=0, errID 0x00000028.15b0aed0
     AFSR 0x00000001<ME>.80200000<PRIV,UE> AFAR
0x00000000.1d564fc0
     AFSR.PSYND 0x0000(Score 05) AFSR.ETS 0x00 Fault_PC
0x100353dc
     UDBH 0x0203<UE> UDBH.ESYND 0x03 UDBL 0x0203<UE> UDBL.ESYND
0x03
     UDBL Syndrome 0x3 Memory Module 190x
WARNING: [AFT1] errID 0x00000028.15b0aed0 Syndrome 0x3 indicates
that this may not be a memory module problem
panic[cpu1]/thread=10408000: [AFT1] errID 0x00000028.15b0aed0 UE
Error(s)
     See previous message(s) for details
skipping system dump - no dump device configured
rebooting...
Resetting ...

WORKS FINE WITH BOOT CDROM -S

Regards

_________________________________________________________
Click below to visit monsterindia.com and review jobs in India or
Abroad
http://monsterindia.rediff.com/jobs
_______________________________________________
sunmanagers mailing list
sunmanagers@sunmanagers.org
http://www.sunmanagers.org/mailman/listinfo/sunmanagers



This archive was generated by hypermail 2.1.7 : Wed Apr 09 2008 - 23:24:24 EDT