From: alex avriette (alex@posixnap.net)
Date: Sat May 03 2003 - 13:07:53 EDT
Going through the sunmanagers archives, this seems to be a frequently
asked question. However, the answers are typically:
Reseat the ram
That machine can't run 2.4
That machine has more cache than 2.5 will support
It only seems to boot off the "first sbus"
None of which are applicable here. Well, except the first one, but I'm
sure that isn't it (my thumbs are blistered from seating this ram).
I have an ultra 30/300. It has 512mb of ram in it. Solaris 9 is
installed, and has been running quite happily for a few months. Last
night I added another 256mb of ram to it. When it came up, it came to
the 'ok' prompt (I have it set to not auto-boot). I gave it the typical
command, 'boot disk', which had always worked in the past. It said it
was booting, and hung. I figured that this indicated a ram problem, and
removed the 256mb I had put in. Now when it boots, it goes through the
diag-switch mode (I think because I removed the keyboard, mouse, and
monitors, and I'm talking to it on serial now), gives me this "Fast
Data Access MMU Miss" problem. Mind you, it goes through the whole
suite of memory tests flawlessly, correctly indicating where and how
much ram I have. It just can't bring itself to boot. Here's the output
from the most recent (non) boot:
!ZHardware Power O!Z!ZButton Power ON
SCUPP detected
Configuring SCUP for 84.0-100.0 Mhz
@(#) Sun Ultra 30 UPA/PCI 3.11 Version 2 created 1998/04/20 15:37
Probing keyboard Done
%o0 = 0000.0000.0000.4001
Executing Power On SelfTest
@(#) Sun Ultra 30 UPA/PCI POST 1.1.1 03/04/97
CPU: UltraSPARC 2 (MHz: 296 MID: 0 Ecache Size: 2048KB)
Init System BSS
NVRAM Battery Detect Test
NVRAM Scratch Addr Test
NVRAM Scratch Data Test
M48T59 TOD Timestamp Test
M48T59 TOD Init Test
M48T59 TOD Functional Test
DMMU TLB Tag Access Test
DMMU TLB RAM Access Test
Probe Ecache
Ecache RAM Addr Test
Ecache Tag Addr Test
Invalidate Ecache Tags
Init SC Regs
SC Address Reg Test
SC Reg Index Test
SC Regs Test
Init SC Regs
Probe Memory
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
Interleave Mode Disable
Malloc Post Memory
Init Post Memory
Memory Addr w/ Ecache Test
Map PROM/STACK/NVRAM in DMMU
Update Master Stack/Frame Ptrs
V9 Instruction Test
CPU Tick and Tick Compare Reg Test
CPU Soft Trap Test
CPU Softint Reg and Int Test
FPU Regs Test
FPU Move Regs Test
FPU State Reg Test
FPU Functional Test
FPU Trap Test
DMMU Primary Context Reg Test
DMMU Secondary Context Reg Test
DMMU TSB Reg Test
DMMU Tag Access Reg Test
DMMU VA Watchpoint Reg Test
DMMU PA Watchpoint Reg Test
IMMU TSB Reg Test
IMMU Tag Access Reg Test
IMMU TLB RAM Access Test
IMMU TLB Tag Access Test
Dcache RAM Test
Dcache Tag Test
Icache RAM Test
Icache Tag Test
Icache Next Test
Icache Predecode Test
Displacement Flush Ecache
Ecache RAM Test
Ecache Tag Test
Ecache Access Test
Init Psycho
Psycho Cntl and UPA Reg Test
Psycho DMA Scoreboard Reg Test
Psycho Perf Cntl Reg Test
PIO Decoder and BCT Test
PCI Byte Enable Test
Counter/Timer Limit Regs Test
Timer Increment Test
Timer Reload Test
Timer Periodic Test
Mondo Int Map (short) Reg Test
Mondo Int Set/Clr Reg Test
Psycho IOMMU Regs Test
Psycho IOMMU RAM NTA Test
Psycho IOMMU CAM NTA Test
Psycho IOMMU RAM Address Test
Psycho IOMMU CAM Address Test
IOMMU TLB Compare Test
IOMMU TLB Flush Test
Stream Buff A Control Reg Test
Psycho ScacheA Page Tag Addr Test
Psycho ScacheA Line Tag Addr Test
Psycho ScacheA RAM Addr Test
Psycho ScacheA Page Tag NTA Test
Psycho ScacheA Line Tag NTA Test
Psycho ScacheA Error Status NTA Test
Psycho ScacheA RAM NTA Test
Stream Buff B Control Reg Test
Psycho ScacheB Page Tag Addr Test
Psycho ScacheB Line Tag Addr Test
Psycho ScacheB RAM Addr Test
Psycho ScacheB Page Tag NTA Test
Psycho ScacheB Line Tag NTA Test
Psycho ScacheB Error Status NTA Test
Psycho ScacheB RAM NTA Test
PBMA PCI Config Space Regs Test
PBMA Control/Status Reg Test
PBMA Diag Reg Test
PBMB PCI Config Space Regs Test
PBMB Control/Status Reg Test
PBMB Diag Reg Test
Init Memory
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
Memory RAM Test
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
Memory Addr w/ Ecache Test
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
Block Memory Addr Test
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
Displacement Flush Ecache Test
ECC Memory Addr Test
INFO: 0MB Bank 0
INFO: 0MB Bank 1
INFO: 0MB Bank 2
INFO: 0MB Bank 3
INFO: 128MB Bank 4
INFO: 256MB Bank 5
INFO: 64MB Bank 6
INFO: 64MB Bank 7
DMMU Hit/Miss Test
IMMU Hit/Miss Test
DMMU Little Endian Test
IU ASI Access Test
FPU ASI Access Test
Ecache Thrash Test
UltraSPARC-2 Prefetch Instructions Test
CPU UPA Config: 000006b6.3cc0803b
SRAM Mode: 22 Clock Mode: 3:1 ELIM: 3 PCON: 0f3 MCAP: 13
Ecache Size Limited: 2048KB
Test 0: prefetch_mr
Test 1: prefetch to non-cacheable page
Test 2: prefetch to page with dmmu misss
Test 3: prefetch miss does not check alignment
Test 4: prefetcha with asi 0x4c is noped
Test 5: prefetcha with asi 0x54 is noped
Test 6: prefetcha with asi 0x6e is noped
Test 7: prefetcha with asi 0x76 is noped
Test 8: prefetch with fcn 5
Test 9: prefetch with fcn 2
Test 10: prefetch with fcn 12
Test 11: prefetch with fcn 16 is noped
Test 12: prefetch with fcn 29 is noped
Test 13: prefetcha with asi 0x15 is noped
Test 14: prefetch with fcn 3
Test 15: prefetcha14 with fcn 2
Test 16: prefetcha80_mr
Test 17: prefetcha81_1r
Test 18: prefetcha10_mw
Test 19: prefetcha80_17 is noped
Test 20: prefetcha10_6: illegal instruction trap
Test 21: prefetcha11_1w
Test 22: prefetcha81_31
Test 23: prefetcha11_15: illegal instruction trap
Init Psycho
Mondo Generate Interrupt Test
Timer Interrupt Test
Timer Interrupt w/ periodic Test
Psycho Stream Buff A Flush Sync Test
Psycho Stream Buff B Flush Sync Test
Psycho Stream Buff A Flush Invalidate Test
Psycho Stream Buff B Flush Invalidate Test
Psycho Merge Buffer w/ Scache A Test
Psycho Merge Buffer w/ Scache B Test
Consist DMA Rd, IOMMU miss Ebus Test
Consist DMA Rd, IOMMU miss Lpbk Test
Consist DMA Rd, IOMMU hit Ebus Test
Consist DMA Rd, IOMMU hit Lpbk Test
Consist DMA Wr, IOMMU miss Ebus Test
Consist DMA Wr, IOMMU miss Lpbk Test
Consist DMA Wr, IOMMU hit Ebus Test
Consist DMA Wr, IOMMU hit Lpbk Test
Stream DMA Rd, IOMMU miss, Scache Miss Ebus Test
Stream DMA Rd, IOMMU miss, Scache Miss Lpbk Test
Stream DMA Rd, IOMMU hit, Scache Miss Ebus Test
Stream DMA Rd, IOMMU hit, Scache Miss Lpbk Test
Stream DMA Rd, IOMMU Miss, Scache(prev rd) Hit Ebus Test
Stream DMA Rd, IOMMU Miss, Scache Hit (prev rd) Lpbk Test
Stream DMA Rd, IOMMU Hit, Scache Hit Ebus Test
Stream DMA Rd, IOMMU Hit, Scache Hit (prev rd) Lpbk Test
Stream DMA Rd, IOMMU Miss, Scache Hit(prev wr) Ebus Test
Stream DMA Rd, IOMMU Miss, Scache Hit (prev wr) Lpbk Test
Stream DMA Rd, IOMMU Hit, Scache Hit(prev wr) Ebus Test
Stream DMA Rd, IOMMU Hit, Scache Hit (prev wr) Lpbk Test
Stream DMA Wr, IOMMU miss, Scache Miss Ebus Test
Stream DMA Wr, IOMMU miss, Scache Miss Lpbk Test
Stream DMA Wr, IOMMU hit, Scache Miss Ebus Test
Stream DMA Wr, IOMMU hit, Scache Miss Lpbk Test
Stream DMA Wr, IOMMU Miss, Scache(prev rd) Hit Ebus Test
Stream DMA Wr, IOMMU Miss, Scache(prev rd) Hit Lpbk Test
Stream DMA Wr, IOMMU Hit, Scache(prev rd) Hit Ebus Test
Stream DMA Wr, IOMMU Hit, Scache(prev rd) Hit Lpbk Test
Stream DMA Wr, IOMMU Miss, Scache(prev wr) Hit Ebus Test
Stream DMA Wr, IOMMU Miss, Scache(prev wr) Hit Lpbk Test
Stream DMA Wr, IOMMU Hit, Scache(prev wr) Hit Ebus Test
Stream DMA Wr, IOMMU Hit, Scache(prev wr) Hit Lpbk Test
Pass-Thru DMA Rd, Ebus device Test
Pass-Thru DMA Wr, Ebus device Test
Consist DMA Rd, IOMMU LRU Lock Ebus Test
Consist DMA Rd, IOMMU LRU Lock Lpbk Test
Stream DMA Rd, IOMMU LRU Lock, Scache LRU Lock Ebus Test
Stream DMA Rd, IOMMU LRU Lock, Scache LRU Lock Lpbk Test
Stream DMA Rd, IOMMU miss, Scache LRU Lock Ebus Test
Stream DMA Rd, IOMMU Miss, Scache LRU Lock Lpbk Test
Stream DMA Rd, IOMMU Hit, Scache LRU Lock Ebus Test
Stream DMA Rd, IOMMU Hit, Scache LRU Lock Lpbk Test
Stream DMA Rd, IOMMU LRU Lock, Scache Miss Ebus Test
Stream DMA Rd, IOMMU LRU Lock, Scache Miss Lpbk Test
Consist DMA Wr, IOMMU LRU Locked Ebus Test
Consist DMA Wr, IOMMU LRU Lock Lpbk Test
Stream DMA Wr, IOMMU LRU Lock, Scache LRU Lock Ebus Test
Stream DMA Wr, IOMMU LRU Lock, Scache LRU Lock Lpbk Test
Stream DMA Wr, IOMMU Miss, Scache LRU Lock Ebus Test
Stream DMA Wr, IOMMU Miss, Scache LRU Lock Lpbk Test
Stream DMA Wr, IOMMU Hit, Scache LRU Lock Ebus Test
Stream DMA Wr, IOMMU Hit, Scache LRU Lock Lpbk Test
Stream DMA Wr, IOMMU LRU Lock, Scache Miss Ebus Test
Stream DMA Wr, IOMMU LRU Lock, Scache Miss Lpbk Test
Stream DMA Wr, IOMMU LRU Lock, Scache(prev rd) Hit Ebus Test
Stream DMA Wr, IOMMU LRU Lock, Scache(prev rd) Hit Lpbk Test
CPU Addr Align Trap Test
DMMU Access Priv Page Test
DMMU Write Protected Page Test
Init Psycho
PIO Read Error, Master Abort Test
PIO Read Error, Target Abort Test
PIO Write Error, Master Abort Test
PIO Write Error, Target Abort Test
Pri CE ECC Error Test
Pri UE ECC Error Test
Pri 2 bit w/ bit hole UE ECC Err Test
Pri 3 bit UE ECC Err Test
STATUS =PASSED
Power On Selftest Completed
!Z!ZSoftware Power ON0000.0000.0000 ffff.ffff.f00b.1668
019f.3333.0a50.0011
SCUPP detected
Configuring SCUP for 84.0-100.0 Mhz
@(#) Sun Ultra 30 UPA/PCI 3.11 Version 2 created 1998/04/20 15:37
Clearing E$ Tags Done
Clearing I/D TLBs Done
Probing Memory
SIMM population : 0000.0000.2222.0000
SIMM esize info : 0000.0000.2284.0000
SIMM msize info : 0000.0000.2284.0000
MEM BASE = 0000.0000.7000.0000
MEM SIZE = 0000.0000.0400.0000
Memory interleave: Disabled
MMUs ON
Copy Done
PC = 0000.01ff.f000.242c
PC = 0000.0000.0000.2470
Decompressing into Memory Done
Size = 0000.0000.0006.d990
ttya initialized
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1
POR:0
Probing Memory Bank #0 0 + 0 : 0 Megabytes
Probing Memory Bank #1 0 + 0 : 0 Megabytes
Probing Memory Bank #2 0 + 0 : 0 Megabytes
Probing Memory Bank #3 0 + 0 : 0 Megabytes
Probing Memory Bank #4 64 + 64 : 128 Megabytes
Probing Memory Bank #5 128 + 128 : 256 Megabytes
Probing Memory Bank #6 32 + 32 : 64 Megabytes
Probing Memory Bank #7 32 + 32 : 64 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,ffb
Probing UPA Slot at 1d,0 SUNW,ffb
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape
Probing /pci@1f,4000 at Device 2 pci108e,5043
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 pci108e,7063
Probing /pci@1f,2000 at Device 2 Nothing there
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1
POR:0
Probing Memory Bank #0 0 + 0 : 0 Megabytes
Probing Memory Bank #1 0 + 0 : 0 Megabytes
Probing Memory Bank #2 0 + 0 : 0 Megabytes
Probing Memory Bank #3 0 + 0 : 0 Megabytes
Probing Memory Bank #4 64 + 64 : 128 Megabytes
Probing Memory Bank #5 128 + 128 : 256 Megabytes
Probing Memory Bank #6 32 + 32 : 64 Megabytes
Probing Memory Bank #7 32 + 32 : 64 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,ffb
Probing UPA Slot at 1d,0 SUNW,ffb
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape
Probing /pci@1f,4000 at Device 2 pci108e,5043
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 pci108e,7063
Probing /pci@1f,2000 at Device 2 Nothing there
Sun Ultra 30 UPA/PCI (UltraSPARC-II 296MHz), No Keyboard
OpenBoot 3.11, 512 MB memory installed, Serial #10122833.
Ethernet address 8:0:20:9a:76:51, Host ID: 809a7651.
ok boot disk
Boot device: /pci@1f,4000/scsi@3/disk@0,0 File and args:
Loading ufs-file-system package 1.4 04 Aug 1995 13:02:54.
FCode UFS Reader 1.11 97/07/10 16:19:15.
Fast Data Access MMU Miss
ok
---- As I said, everything seems to check out, except that the poor machine won't boot. Any ideas? Thanks in advance, and of course I will summarize. Alex _______________________________________________ sunmanagers mailing list sunmanagers@sunmanagers.org http://www.sunmanagers.org/mailman/listinfo/sunmanagers
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